21. DAC_IO

Overview

  • 使用AC636N,控制DACL、DACR的电平输出用作普通IO

21.1. 应用示例

  • DAC_IO的具体源代码详见 bsp/AC636N/src/dac_io.c

  • dac_io.c中有测试例程dac_io_test()

    void dac_io_test()
    {
        extern void audio_dac_io_open(void);
        extern void audio_dac_io_set(u8 ch, u8 value);
    
        audio_dac_io_open();//init & start dac
    
        for(int i= 0; i < 6; i++){
            audio_dac_io_set(0x3,1);//set DACLR high level
            mdelay(50);
            audio_dac_io_set(0x3,0);//set DACLR low level
            mdelay(50);
        }
    }
    
  • 使用时先调用audio_dac_io_open()初始化和开启DAC,然后调用audio_dac_io_set(u8 ch, u8 value)设置DACL或DACR的电平输出

  • audio_dac_io_set(u8 ch, u8 value)设置控制DACL、DACR电平,u8 ch选择控制的通道,u8 value设置电平

  • parm ch:0x1:BIT(0)-DACL脚 0x2:BIT(1)-DACR脚 0x3:(BIT(0)|BIT(1))-DACL和DACR

  • value: 1:High level高电平 0:Low level低电平

    void audio_dac_io_open(void)
    {
        dac_data.output = DAC_OUTPUT_LR;//DACL & DACR OUTPUT 双通道
        audio_dac_init(&dac_hdl, &dac_data);
    
        s16 dacr32 = read_capless_DTB();
        audio_dac_set_capless_DTB(&dac_hdl, dacr32);
        audio_dac_set_buff(&dac_hdl, dac_io_buff, sizeof(dac_io_buff));
    
        audio_dac_set_sample_rate(&dac_hdl, 48000);                                                 // 采样率设置
    
        audio_dac_start(&dac_hdl);                                                                                  // dac 启动
    
    
        JL_AUDIO->DAC_CON |= BIT(6);
        JL_AUDIO->DAC_CON |= BIT(5);
    
        audio_dac_ch_analog_gain_set(&dac_hdl, 0x3, 31); //0x1:BIT(0)-DACL  0x2:BIT(1)-DACR  0x3:(BIT(0)|BIT(1))-DACRL
    
        audio_dac_ch_digital_gain_set(&dac_hdl, 0x3, 16384);//0x1:BIT(0)-DACL  0x2:BIT(1)-DACR  0x3:(BIT(0)|BIT(1))-DACRL
    
        JL_AUDIO->DAC_CON &= ~(BIT(12) | BIT(13) | BIT(14) | BIT(15));
    
    
        mdelay(80);//开启dac后会有电平抬升到1.4v需要时间,防止刚开启dac就进行audio_dac_io_set时造成电平操作不成功
        printf(">> dac_hdl.channel:%d\n", dac_hdl.channel);
    }
    
  • audio_dac_io_open()初始化后开启DAC,DACL和DACR脚会抬升到1.4V左右需要时间

  • mdelay(80);//开启dac后会有电平抬升到1.4v需要时间,防止刚开启dac就进行audio_dac_io_set时造成电平操作不成功

  • 图中第一次上升电平前的小幅电平抬升为开启DAC,DACLR脚抬升到1.4左右,audio_dac_io_set(u8 ch,1)拉高电平会到2.8-3V左右,audio_dac_io_set(u8 ch,0)拉低电平会到接近0V